The invention provides a wide frequency range voltage-controlled oscillator (VCO) which utilizes negative feedback of the control voltage output by a phase locked loop (PLL) to adjust the VCO""s frequency.
Phase-locked loops (PLLs) are widely used in a variety of communications and control systems applications, including frequency synthesis, clock recovery, signal modulation and signal demodulation applications. A typical analog PLL incorporates a phase detector, a voltage-controlled oscillator (VCO) and a low pass filter. In some applications, it is desirable that the frequency of the VCO""s output clock signal be variable within a wide frequency range.
FIG. 1 schematically depicts a voltage-controlled ring oscillatorxe2x80x94a common prior art VCO architecture formed by connecting a plurality of delay cells 10, 12 . . . 14 in a closed loop. The output clock frequency is determined by the delay contributed by each delay cell, which is in turn controlled by the PLL""s output control voltage VC, as shown schematically in FIG. 2 for a representative delay cell D. If the FIG. 1 VCO is to be variable within a wide frequency range, then each delay cell must have a correspondingly wide delay tuning range.
Each delay cell D typically comprises two transistors (not shown) coupled to form a differential pair, and some active loading components (not shown). Each delay cell D sinks a tail current Itail through voltage-to-current converter 16. Each delay cell D""s delay value is determined by that cell""s Itail value, which is in turn determined by the control voltage VC. Accordingly, the delay tuning range of each delay cell D is limited by the voltage range within which VC can be varied, which is in turn constrained by the power supply voltage, i.e. 0xe2x89xa6VCxe2x89xa6Vdd. More particularly delay cell D""s output frequency f is a function of both Itail and VC. Consequently, and as shown in FIG. 3, if Itail is too small, f is constrained within a relatively low frequency sub-range [fL1,fH1] as indicated at 18; whereas, if Itail is too large, f is constrained within a relatively high frequency sub-range [fL2,fH2] as indicated at 20.
If an offset current source 22 is connected in parallel across voltage-to-current converter 16 as shown in FIG. 4, then the output frequency f can be controlled as a function of both the tail current Itail sunk through voltage-to-current converter 16 (which is determined by VC as aforesaid) and the offset current Ioffset sunk through offset current source 22. A digital counter or similar means (not shown) can be used to control offset current source 22 so as to vary Ioffset through a range of discrete values Ioffset1, Ioffset2, Ioffset3, Ioffset4, Ioffset5, etc. By selectably controlling Ioffset in this fashion one may select any one of a corresponding number of discrete frequency operating sub-ranges [fL1,fH1], [fL2,fH2], [fL3,fH3], [fL4,fH4], [fL5,fH5], etc. as indicated at 24, 26, 28, 30, 32 respectively in FIG. 5.
The discrete Ioffset values, and consequently the discrete frequency operating sub-ranges of the FIG. 4 apparatus are undesirably affected by changes in integrated circuit process and operating temperature conditions. The FIG. 4 apparatus also requires presetting of digital registers, initialization of comparator reference voltages, or some similar operation in order to select a particular one of the discrete frequency operating sub-ranges. It is difficult to ensure that all such preset or initialization values will produce the desired frequency operating sub-range under all integrated circuit process and operating temperature conditions which are likely to be encountered. Moreover, the PLL locking time is increased by the delay inherent in changing the preset or initialization values in order to select a different frequency operating sub-range.
The invention provides a method and apparatus for continuously varying VCO frequency through a wide frequency range in proportion to a first control voltage VC produced by a PLL containing the VCO. A second control voltage NVC is produced as a monotonically decreasing function of VC. A first current I0 is produced in proportion to VC and a second current I1 is produced in proportion to NVC. I1 is subtracted from I0, producing a control current IC=I0-I1 which is applied to the VCO.